Journal of Computational Electronics Drain Current Multiplication In Thin Pillar Vertical MOSFETS Due to Depletion Isolation And Charge Coupling

Drain current multiplication in vertical MOSFETs due to body isolation by the drain depletion region and gate-gate charge coupling are investigated at pillar thicknesses in the range 200-10 nm. For pillar thickness > 120 nm depletion isolation does not occur and hence the body contact is found to be completely effective with no multiplication in drain current, whereas for pillar thicknesses < 60 nm depletion isolation occurs for all drain biases and hence the body contact is ineffective. For intermediate pillar thicknesses of 60-120 nm, even though depletion isolation is apparent, the body contact is still effective in improving floating body effects and breakdown. At these intermediate pillar thicknesses, a kink is also observed in the output characteristics due to partial depletion isolation. The charging kink and the breakdown behaviour are characterized as a function of pillar thickness and a transition in the transistor behavior is seen at a pillar thickness of 60 nm. For pillar thickness greater than 60 nm, the voltage at which body charging occurs decreases (and the normalized breakdown current increases) with decreasing pillar thickness, whereas for pillar thickness less than 60 nm, the opposite trend is seen. The relative contributions to the drain current of depletion isolation and the inherent gate-gate charge coupling are quantified. For pillar thickness between 120 and 80 nm, the rise in the drain current is found to be mainly due to depletion isolation., whereas for pillar thicknesses < 60 nm, the increase in the drain current is found to be governed by the inherent gate-gate charge coupling. Powered by Editorial Manager® and ProduXion Manager® from Aries Systems Corporation